Category:Integrated circuits

A

• Application-specific integrated circuits‎ (6 C, 20 P)

C

• Chip carriers‎ (38 P)
• Chip shortage‎ (2 P)
• Chipsets‎ (5 C, 11 P)

D

• Display drivers‎ (1 P)

F

• Field-programmable gate arrays‎ (1 C, 6 P)

G

• Graphics chips‎ (48 P)

I

• Image sensors‎ (5 C, 48 P)
• Input/output integrated circuits‎ (28 P)

L

• Linear integrated circuits‎ (31 P)
• Logic families‎ (39 P)

M

• Microprocessors‎ (24 C, 26 P)
• MOS Technology integrated circuits‎ (1 C, 18 P)
• MOSFETs‎ (7 C, 84 P)

N

• Network on a chip‎ (4 P)
• Nintendo chips‎ (11 P)

S

• Sony semiconductors‎ (2 C, 4 P)
• Sound chips‎ (1 C, 32 P)
• System on a chip‎ (3 C, 38 P)

U

• Upcoming integrated circuits‎ (1 P)

• Integrated circuit

*

• Invention of the integrated circuit
• List of integrated circuit manufacturers

0–9

• 2.5D integrated circuit
• 3Com 3c509
• List of 4000-series integrated circuits
• 4000-series integrated circuits
• List of 7400-series integrated circuits
• 7400-series integrated circuits

A

• AMD Lance Am7990
• Angle-sensitive pixel
• Antenna effect
• ANTIC
• Application-specific instruction set processor
• Application-specific integrated circuit
• Atari AMY
• AY-3-8500
• AY-3-8610

B

• Beyond CMOS
• BiCMOS
• Built-in self-test

C

• Cactus graph
• Carbon nanotubes in interconnects
• Charge controller
• Charge-coupled device
• Chip art
• Chip creep
• Chiplet
• Chipset
• CHMOS
• Circuit extraction
• CMD640
• CMOS
• CMOS amplifier
• Compliant bonding
• Configurable mixed-signal IC
• Copper interconnects
• CoreHW
• Critical area (computing)
• CTIA and GTIA
• Current conveyor

D

• Josephson junction count
• Decapping
• Delay-locked loop
• Design rule checking
• Die (integrated circuit)
• Die shot
• Die shrink
• Digital clock manager
• Digital signal controller
• Digital signal processor
• Disk array controller
• Disk controller
• Dye-and-pry

E

• EDA database
• Electromagnetic field solver
• Elmore delay
• Engineering sample
• EPROM

F

• Fault coverage
• Field-programmable analog array
• Field-programmable gate array
• Field-programmable object array
• Floppy-disk controller
• Fluorosilicate glass
• Full custom
• Fully differential amplifier

G

• GATTO
• General-purpose input/output
• Gold–aluminium intermetallic
• Google Silicon Initiative
• GP5 chip
• GreenPAK

H

• HCMOS
• Heat generation in integrated circuits
• High Precision Event Timer
• Hot-carrier injection

I

• IC power-supply pin
• Iddq testing
• Integrated circuit design
• Integrated circuit layout
• Integrated circuit layout design protection
• Integrated fluidic circuit
• Interconnect (integrated circuits)
• Interconnect bottleneck
• Interface logic model
• Interposer
• Inverter (logic gate)
• Irreversible circuit

J

• Jungle chip

L

• Lab-on-a-chip
• Latch-up
• List of countries by integrated circuit exports
• Logic built-in self-test

M

• Magic (software)
• MAX232
• Mead–Conway VLSI chip design revolution
• Memory controller
• Memory management controller (Nintendo)
• Microlithography
• Moisture sensitivity level
• Monolithic microwave integrated circuit
• Morse Micro
• List of MOSFET applications
• MOSIS
• Motorola 68881

N

• NCR 53C9x
• NCR 5380
• NE1000
• Network on a chip
• Network search engine
• Neurochip
• Noise margin

O

• Operational amplifier
• Optical interconnect

P

• P–n junction isolation
• Passivation (chemistry)
• PCMOS
• Bob Pease
• Peripheral DMA controller
• Photonic integrated circuit
• Pin compatibility
• Placement (electronic design automation)
• PLL multibit
• POKEY
• Power management integrated circuit
• PowerHUB
• Process control monitoring
• Process corners
• Programmer (hardware)
• Cypress PSoC

Q

• Quality intellectual property metric
• Quality of results

R

• Radiation hardening
• RAID processing unit
• RCA CDP1861
• Readout integrated circuit
• Real-time clock
• Repeater insertion
• Resistor–transistor logic
• RF CMOS
• RFIC

S

• SCMOS
• Semiconductor Chip Protection Act of 1984
• Semiconductor memory
• Sensor hub
• Seven Solutions
• Silicon–germanium
• Special input/output
• Stepping level
• Substrate coupling
• Superconducting computing
• System basis chip
• System in a package

T

• Test compression
• Thermal simulations for integrated circuits
• Three-dimensional integrated circuit
• Through-silicon via
• TMS6100
• Transistor array
• Transistor count
• Transmission-line pulse

U

• ULN2003A
• Universal Test Specification Language

V

• Very High Speed Integrated Circuit Program
• Very-large-scale integration
• VLSI Project

W

• Wafer-scale integration
• Western Digital FD1771
• Jim Williams (analog designer)