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Transformer read-only storage

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Transformer matrix ROM (TROS), from the IBM System/360 Model 40

Transformer read-only storage (TROS) was a type of read-only memory (ROM) used between the mid-1940s to the late 1960s, prior to the common use of semiconductor ROM. TROS consisted of wires fed through and around transformer cores. The wires would register binary digits (1s and 0s) through inductance and separate wires sensing the change in current.

Transformer read-only storages were first invented by T. L. Dimond in 1945 at Bell Laboratories for the No. 5 Crossbar switch to assist in the automatic message accounting (AMA) equipment. Later applications include the Bell Laboratories Model 6 computer and the IBM System/360 Model 20 and Model 40.[1] TROS was considered simple in design, albeit with flaws that discouraged later applications due to demands for higher computer performance.

Overview

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TROS was created by IBM as a read-only storage method for storing microcode for IBM computers. TROS used stacks of removable Mylar flexible printed wiring sheets that fitted onto fixed transformer bases. It was used on the IBM System/360 Model 20, IBM System/360 Model 40 and the Type 2841 file control unit.[2]

Structure

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The design of TROS is based on induced current from wires passing through magnetic ring-shaped transformer cores. Wires, called word lines, are threaded through and out of these ring-shaped cores. Another wire, called a sense winding, would wrap around one part of the transformer core.[1]

The first version of TROS used large permalloy cores as magnetic cores. The permalloy cores would be placed side by side, with the hole of the core facing upwards for word lines to go through. Magnet wire was used as word lines for this version of TROS. The sense winding would connect to a gas tube.[3]

Later designs for the IBM System/360 had removable sheets of Mylar with embedded copper wiring as the word lines. These sheets would surround a transformer core consisting of a U-shaped and I-shaped ferrite core.[1][2] The copper wiring would be arranged in a grid-like pattern, with some lines disconnected to allow the current to pass through or around a core. The sense windings would wind around the I-shaped section of the ferrite core, with the sense windings connected to output connections.

To retrieve memory from TROS, a pulse of electricity would pass through one of the word lines. Whenever a current passes through a transformer core, a current is induced into the sense winding. A separate system (such as a gas tube) would detect this current in the sense winding and register a 1. Subsequently, a 0 would be registered if no current was detected.

History

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The earliest form of TROS was developed by T. L. Dimond in 1945 for the No. 5 Crossbar switch. Within Bell Laboratories, TROS was called the Dimond ring translator.[3] Its purpose was to convert an equipment number to a directory number for the AMA equipment in the Crossbar switch, which billed phone calls.

In 1959, TROS was used in the Scientific Computer and Modular Processor (SCAMP) project by the IBM Hursley team.[4] The SCAMP project would be scrapped in favor of a larger project that would be worked on by multiple IBM teams. In 1963, based on their experience with TROS, the Hursley team chose TROS to be implemented in the new IBM System/360 family of computers to run microcode.[5]

Card-capacitor read-only storage (CCROS) was also considered for the System/360, with both TROS and CCROS being developed for the System/360. Due to unexpectedly high amounts of electrical noise from CCROS, the Hursley team chose TROS to be used for the Model 20 and Model 40, with CCROS implemented in the Model 30.[2] This version of TROS had sheets of Mylar with copper wiring, making manufacturing and code adjustments easier.

Larger models of the System/360 would alternatively use the faster balanced-capacitor read-only storage (BCROS) to accommodate the desired higher performance. By the late 1960s, semiconductor memory had gotten cheaper, was easier to store, and could hold more memory than TROS, rendering TROS obsolete.[2]

Use

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TROS memory was used to store microcode for mainframe computers and intelligent controllers used to control sophisticated storage devices such as disk drives and tape drives. If there were a bug in the microcode it was possible to rework it by replacing one or more of the printed wiring sheets, thereby changing the contents of the microcode memory.

Limitations

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TROS was known to be slower than other forms of read-only memory around the 1960s.[1] TROS had a cycle time of 600 nanoseconds and an access time of 240 nanoseconds on a 105 bit storage. BCROS, although smaller in memory size, had a cycle time of 200 nanoseconds and an access time of 90 nanoseconds.[2][6] CCROS had an access time of 10 microseconds for 107 bit storage and 100 nanoseconds for 104 bit storage.[7]

TROS was also difficult to alter once word lines were threaded. Typically, word lines that needed to be changed were disconnected and left in the system, while a new wire was threaded.[8] This limitation was overcome with the use of Mylar sheets, allowing for easy removal and installation of new word lines.

In some cases, output signals could be registered without the word line threading through a transformer. Word lines placed too close to one another would create a capacitance, causing the current to flow to a neighboring word line. This accidental flow of current resulted in another transformer core sensing a stray signal.[1]

References

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  1. ^ a b c d e Taub, D. M.; Kington, B. W. (September 1964). "The Design of Transformer (Dimond Ring) Read-Only Stores". IBM Journal of Research and Development. 8 (4): 443–459. doi:10.1147/rd.84.0443. ISSN 0018-8646.
  2. ^ a b c d e Pugh, Emerson W.; Johnson, Lyle R.; Palmer, John H. (2003). IBM's 360 and Early 370 Systems. MIT Press. pp. 175–553. ISBN 9780262290944.
  3. ^ a b Kline, Ronald R.; Joel, A. E. (October 1986). "A History of Engineering and Science in the Bell System: Switching Technology (1925-1975)". Technology and Culture. 27 (4): 135–141. doi:10.2307/3105350. ISSN 0040-165X.
  4. ^ "Hardware Detail". IBM Hursley Museum. Retrieved November 7, 2023.
  5. ^ "Transformer Read-Only Storage (TROS) module - CHM Revolution". www.computerhistory.org. Retrieved 2023-10-31.
  6. ^ Abbas, S. A.; Ayling, J. K.; Gifford, C. E.; Gladu, R. G.; Kwei, T. C.; Taren, W. J. (July 1968). "A Balanced Capacitor Read-Only Storage". IBM Journal of Research and Development. 12 (4): 307–317. doi:10.1147/rd.124.0307. ISSN 0018-8646.
  7. ^ Foglia, H. R.; McDermid, W. L.; Petersen, H. E. (January 1961). "Card Capacitor—A Semipermanent, Read Only Memory [Letter to the Editor]". IBM Journal of Research and Development. 5 (1): 67–68. doi:10.1147/rd.51.0067. ISSN 0018-8646.
  8. ^ Lewin, Morton H. (1965). "A survey of read-only memories". AFIPS '65 (Fall, part I): Proceedings of the November 30--December 1, 1965, fall joint computer conference, part I. ACM Press: 775. doi:10.1145/1463891.1463976.
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