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Field-effect tetrode

From Wikipedia, the free encyclopedia

The tetrode field-effect transistor[1] or field-effect tetrode is a solid-state semiconductor device, constructed by creating two field-effect channels back-to-back, with a junction between. It is a four-terminal device which does not have specific gate terminals because each channel is a gate for the other,[2] the voltage conditions modulating the current carried by the other channel.[3]

Current–voltage relationship

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Where the voltage on the first channel is and the voltage on the second channel is , the current in the first channel, , and the current in the second channel, , are given by:

and

,

where the are the low-voltage conductance of the channels and is the pinch-off voltage (assumed to be the same for each channel).

Applications

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The field-effect tetrode can be used as a highly linear electronically variable resistor – resistance is not modulated by signal voltage. Signal voltage can exceed bias voltage, pinch-off voltage, and junction breakdown voltage. The limit is dependent on dissipation. Signal current flows in inverse proportion to the channel resistances. The signal does not modulate the depletion layer, so the tetrode can perform at high frequencies. The tuning ratio can be very large – the high resistance limit is in the megohms range for symmetrical pinch-off conditions.[2]

See also

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References

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  1. ^ Tetrode field-effect transistor, JEDEC definition
  2. ^ a b Raymond M. Warner Jr.; James N. Fordemwalt, eds. (1965). Integrated Circuits: Design Principles and Fabrication. McGraw Hill. pp. 220–223.
  3. ^ Christopher G. Morris, ed. (15 September 1992). Academic Press Dictionary of Science and Technology. Academic Press. p. 824. ISBN 9780122004001.