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USB4
Deprecated USB4 40 Gbps logo
Type USB
Production history
Designer USB Promoter Group
Designed 29 August 2019; 4 years ago (2019-08-29)
Superseded USB 3.2
Daisy chain No
Audio signal DisplayPort
Video signal DisplayPort
Connector USB-C
Electrical
Max. voltage 48 V (PD 3.1)
Max. current 5 A (PD)
Data
Data signal Yes
Bitrate 20 Gbit/s (optionally up to 120 Gbit/s)
USB4 Gen3x2 cable (40 Gbps) with 100 W Power Delivery

USB4 (Universal Serial Bus 4), sometimes erroneously referred to as USB 4.0, is the most recent technical specification of the USB (Universal Serial Bus) data communication standard. The USB Implementers Forum originally announced USB4 in 2019.

USB4 enables multiple devices to dynamically share a single high-speed data link. USB4 devices must support a data communication signaling rate of at least 20 gigabits (Gbit/s). The current version allows bit rates of 40 Gbit/s (since USB4 version 1.0) and 80 Gbit/s (since USB4 version 2.0).[1][2] USB4 is only defined for the USB-C connector and its Type-C specification[3] regulates the connector, cables and also power delivery features across all uses of USB-C cables, in part[4] with the USB Power Delivery specification.[5]


The USB4 standard is backwards compatible to USB 2.0, USB 3.2 and DP functionality. The dynamic sharing of bandwidth of a USB4 connection is achieved by carrying virtualized "tunnels" of other connections, like the previously mentioned ones. In addition to these also natively available connections, USB4 also supports other protocols, such as PCI Express and Ethernet.

USB4 also incorporates the (for some kind of devices optional) Thunderbolt 3 protocol; however, interoperability with Thunderbolt 3 products is mandatory only for select USB4 device types.[6]

History

[edit]

USB4 was announced in March 2019.[7][8] The USB4 specification version 1.0, released 29 August 2019, uses "Universal Serial Bus 4" and specifically "USB4", that is, the short name branding is deliberate without a separating space, which is different from prior versions. Several news reports before the release of that version use the terminology "USB 4.0" and "USB 4".[9][10] Even after publication of rev. 1.0, some sources write "USB 4", claiming "to reflect the way readers search".[11]

At time of publication of version 1.0, promoter companies having employees that participated in the USB4 Specification technical work group were: Apple Inc., Hewlett-Packard, Intel, Microsoft, Renesas Electronics, STMicroelectronics, and Texas Instruments.

Goals stated in the USB4 specification are increasing bandwidth, helping to converge the USB-C connector ecosystem, and "minimize end-user confusion". Some of the key areas to achieve this are using a single USB-C connector type, while retaining compatibility with existing USB and Thunderbolt products.[12]

On 1 September 2022, the USB Promoter Group announced the pending release of the USB4 Version 2.0 specification, and the specification was subsequently released on 18 October 2022.[13][14] It added 80 Gbit/s speeds with optionally asymmetric connections, a new, optional alternative to the existing USB 3.2 tunneling "USB3 Gen T tunneling", removed PCIe overhead limitations and updated the support of DisplayPort to the then current Version 2.1.

Around the release of the new USB4 Version 2.0 specification, USB-IF also transitioned to new logos and names to simplify representing the maximum supported speeds (and wattages) to consumers.[15] The new names are unified across all USB standards and removed the prior, explicit distinction between USB 3.2 and USB4 speeds.


USB4 Protocol

[edit]

Every USB4 device must support the new USB4 protocol, at least with the minimum signaling rate of 20 Gbit/s.

USB4 Hubs & Docks

[edit]

USB4 Hubs and Docks are defined as their own category of USB4 devices, that include further requirements. For example, a USB4 Hub must also serve as a classic USB 3.2 hub with DP Alt mode passthrough with hosts that do not support USB4 connections. See USB4 Features by Device Type for more details.

USB4 Protocol / Connections

[edit]

Every USB4 port must support the USB4 protocol / connections, which is a distinct standard to establish USB4 links / connections between USB4 devices that exists in parallel to previous USB protocols. Unlike USB 2.0 and USB 3.2 it does not provide a way to transfer data directly, but rather it is a mere container that can contain multiple "tunnels" / virtual connections.

Other specifications are referenced to define the contents and internal functionality of a tunnel. USB4 defines the following tunnel types:

  • USB 3.2 connections
  • DisplayPort connections
  • PCIe connections
  • Ethernet/Network connections according to the included USB4Net and Cross-Domain specifications.[16]

Generic Principles of USB4

[edit]

USB4 forms a tree-like topology of USB4 routers (each USB4 device includes a USB4 router to participate in this network). A tunnel can be end-to-end, where the route through the entire network of routers is preconfigured. But tunnels can also be single-hop, where it exists only for a single USB4 link (between 2 routers). In this case the tunnel will be "unpacked" by the recipient and will use some other, tunnel type specific means to identify where the data needs to be sent next. If the next hop is another USB4 router, the data will be ingested again into the next single-hop tunnel until it exits the USB4 network.[17]

Accordingly, single-hop tunnels require specific support in each USB4 router to support even passing them through to further USB4 routers. End-to-end tunnels however only require specific support at the USB4 router where the data is ingested into the tunnel and at the target, the point where the tunnel ends.

Protocol Input/Output Adapters

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A Protocol Input Adapter will ingest a connection according to whatever protocol it is based on and convert the contents into a USB4 tunnel. Protocol Output Adapters do the reverse. They extract a tunnel from the USB4 network and if needed recreate a regular connection from the tunnel contents.

The conversion into a tunnel typically entails removing any Phy/Electrical layer and encoding of the underlying connection standard and potentially losslessly compresses the contents, for example by leaving out empty filler data. A USB4 tunnel itself is virtual and need not conform to any fixed bandwidth or other limitations that stem from the Phy/Electric layer of the underlying connection standard. But since most tunnel types will eventually be converted back to a regular, physical connection again, most of those physical limitations, like max. bandwidth are still likely to apply in the end.

USB3 Gen X Tunneling

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This is a single-hop tunnel that essentially can transport any data according to the USB 3.2 specification. USB3 Gen X follows the USB 3.2 Hub topology, where every USB4 router with more than one USB 3.2 endpoint must include a USB 3.2 hub as well. It is the default way USB 3.2 connections through USB4 are made. Supporting it at 10 Gbit/s (SuperSpeed+, USB 3.2 Gen 2x1) is mandatory on every USB4 DFP. The minimum supported speed for the USB 3.2 connection being tunneled is 10 Gbit/s as every USB4 device already has to support this speed and USB 3.2 Hubs handle converting this to 5 Gbit/s devices that may be connected.

This means, that a USB4 Hub will share a single upstream USB 3.2 connection and distribute its bandwidth across all its downstream facing ports that make us of USB 3.2.

USB3 Gen T Tunneling

[edit]

This is an optional alternative to USB3 Gen X tunneling that was introduced in USB4 Version 2.0. It is an end-to-end variant of USB 3.2.

Through this, it eschews the need for USB 3.2 hubs in every USB4 router that can and will limit the throughput. It allows multiple separate USB 3.2 connections even over shared links. Since it is an end-to-end tunnel, every USB4 hub will support passing it through. USB3 Gen T is intended as exclusively virtual, there exists no physical equivalent for it. Thus, it can only be used inside of a USB4 controller. This allows it to leave the limitations to 10 or 20 Gbit/s connections of USB 3.2 behind, while reusing most of the other parts of the USB 3.2 protocol.[18]

No known USB4 controller implements support for Gen T tunneling to date (August 2024).

DP Tunneling

[edit]

DisplayPort is also tunneled as end-to-end connection. There can be multiple independent DP tunnels, but each will delivered to a single output port (at which point DisplayPort MST might be used to further split each connection up).

USB4 Version 1.0 only defines how to tunnel DP connections according to the DisplayPort 1.4a specification (up to HBR3 speeds). USB4 Version 2.0 updates this support to the full DisplayPort 2.1 specification (up to UHBR20 speeds).

DP tunneling has great understanding of the contents of DP connections, and will efficiently skip/transmit any filler data, reducing the actually utilized bandwidth of a DP tunnel. But since DP connections have real-time requirements, bandwidth must be reserved for them. USB4 mandates that in absence of any other information, the maximum possible bandwidth for the particular DP connection (DP lanes and speed) must be reserved. This reservation only applies to other real-time tunnels though. Reserved, but unused bandwidth can be used by non-real-time tunnels such as PCIe or USB 3.2, but the reservation may still block other DP tunnels from being established.[19]

PCIe Tunneling

[edit]

Similar to USB3 Gen X tunneling, PCIe tunneling uses single-hop tunnels, requiring PCIe switches in every USB4 router that supports PCIe tunneling. USB4 has, from the start, referenced the PCI Express Specification Revision 4 and with USB4 Version 2.0 added references to PCI Express Specification Revision 5.0

PCIe tunneling has had a significant limitation in USB4 Version 1.0 and also Thunderbolt 3: PCIe Express has a variable maximum payload size, which applies end-to-end to a transmission. If any one component or PCIe Switch has a limited MPS, all packets passing through must be limited accordingly. Because USB4 uses a payload of up to 256 Byte per USB4 packet and a PCIe tunnel packet contains further PCIe headers and meta data, the MPS for PCIe tunnels was limited to 128 Byte. This limitation can reduce the efficiency of the PCIe connection greatly for all devices and systems that would otherwise support 256 Byte or even larger MPS.

USB4 Version 2.0 removes this bottleneck (mandatory for all implementers), by defining how a larger PCIe packet can be split across multiple USB4 packets. Support for this new feature requires every USB4 component / controller involved in the PCIe tunnel to implement USB4 Version 2.0.[20]

USB4 operation modes

[edit]

USB4 connections can be expressed with consumer facing names that are also the basis for the official logos used on packaging and products. These are the "20 Gbps", "40 Gbps", "80 Gbps" labels. However, there are also more technical names based on the implementation and use of the USB-C cables. These usually consist of a speed per wire-pair expressed as Gen 1/2/3/4 (5 Gbit/s, 10 Gbit/s, 20 Gbit/s, 40 Gbit/s respectively) and some further information on how many wire-pairs are used in which combination.

USB4 defines a "Lane" as a full-duplex (bidirectional) connection, which for all recent transmission modes consists of one sending and one receiving wire-pair. The "Gen AxB" notation refers to B Lanes of operation mode A. Since Gen 4 modes also introduced asymmetric connections with uneven numbers of wire-pairs dedicated to sending and receiving, the Lane-notation can no longer be applied.

The USB 3.2 family has had the same technical notation retroactively added in the USB 3.1 and USB 3.2 specification versions. Though this shows common principles "Gen A" does not have the same meaning in both USB 3.2 and USB4 specifications. The overlap in naming mainly becomes relevant for cables as shown in Cable Compatibility, which is regulated by Type-C specification shared across all users of Type-C connector.


Comparison of operation modes
Operation mode name Introduced in Encoding Multiple lanes Nominal signaling rate
(Gbit/s) 		raw data rate[a]
(Gbit/s) 		USB-IF
Current Marketing Name[21] 		Logo[21]
per wire-pair total (per direction)
USB 2.0 High-Speed USB 2.0 NRZI w/ bit stuffing Single 0.480 (half-duplex) 0.480 (half-duplex) ? Hi-Speed USB
USB 3.2 Gen 1x1 USB 3.0 8b/10b Single 5 5 4 USB 5Gbps
USB 3.2 Gen 2x1[b] USB 3.1 128b/132b Single 10 10 ~9,7 USB 10Gbps
USB 3.2 Gen 1x2 USB 3.2 8b/10b Dual 5 10 8 (fallback)[c]
USB 3.2 Gen 2x2[b] 128b/132b Dual 10 20 ~19.39 USB 20Gbps
USB4 Gen 2x1[b] USB4 v1.0 64b/66b[d] Single 10 10 ~19.39 (transient/fallback)[e]
USB4 Gen 2x2[b] Dual 10 20 ~19.39 USB 20Gbps
USB4 Gen 3x1 128b/132b[d] Single 20 20 ~19.39 (transient/fallback)[e]
USB4 Gen 3x2 Dual 20 40 ~38.79 USB 40Gbps
USB4 Gen 4 symmetric USB4 v2.0 PAM-3[22]

11b/7t

Dual ~40.58[f] ~81.15 ~80.46 USB 80Gbps
USB4 Gen 4 asymmetric 3tx/1rx or 1tx/3rx ~121.725 / ~40.58 (tx/rx) ~120.69 / ~40.23 —[g]
TB3 Gen 2x2 Does not appear 64b/66b Dual 10.3125 20.625 20 —
TB3 Gen 3x2 128b/132b Dual 20.625 41.25 40 —
  1. ^ Total data rate (1 direction) with encoding overhead removed.
  2. ^ a b c d USB4 Gen 2 is different from USB 3.2 Gen 2. They both signify the same signal rate of 10 Gbit/s, but use different encoding and differ on the electrical layer. They also have different requirements for signal quality.
  3. ^ USB 3.2 Gen 1x2 connection requires both sides to be USB 3.2 "20 Gbps" / Gen 2x2 capable, but fail to establish Gen 2 / 10 Gbit/s per wire-pair connections.
  4. ^ a b USB4 can use optional Reed–Solomon forward error correction (RS FEC). In this mode, 12 × 16 B (128 bit) symbols are assembled together with 2 B (12 bit + 4 bit reserved) synchronisation bits indicating the respective symbol types and 4 B of RS FEC to allow to correct up to 1 B of errors anywhere in the total 198 B block.
  5. ^ a b USB4 is required to support dual-lane modes, but it uses single-lane operations during initialization of a dual-lane link; single-lane link can also be used as a fallback mode in case of a lane bonding error.
  6. ^ Per spec, lines run at 25.6 GBaud. One symbol contains 1 trit of information. Encoding transforms each group of 11 bits into 7 trits. 7 trits give 2187 different values or bits/trit. USB4 Version 2.0 Specification 2023, p84, sec. 3.2
  7. ^ Optional features of USB 80Gbps connections and devices.

Thunderbolt 3 Gen 2 and Gen 3 and the USB4 Gen 2 and Gen 3 modes use very similar signaling, however, Thunderbolt 3 runs at slightly higher speeds called legacy speeds compared to USB4' s rounded speeds.[23] Thunderbolt 3's choices leads to the marketed bandwidth being the actual net data rate (after encoding overhead is removed). USB standards have mostly marketed the raw data rate instead.

USB4 Gen 4 is normally referred to as a speed of "40 Gbps" or 40 Gbit/s, with the full connections based on it being referred to as 80, 120/40, 40/120 Gbit/s. But since the actual signaling no longer is binary, the actual raw bit rates no longer match those numbers exactly.


USB4 capabilties by device type

[edit]
USB4 operation mode requirements[24]
Type USB operation mode / protocol Host Hub (Dock) Peripheral device
USB4 Gen 2x2 Yes Yes Yes
Gen 3x2 Optional Yes Optional
Gen 4 symm. Optional Optional Optional
Gen 4 asymm. (3tx/1rx or 1tx/3rx) Optional Optional[a] Optional
Host-to-Host communications / USB4 Networking Yes Yes —
Tunneled USB 3.2 Gen 2x1 Yes Yes Optional
USB 3.2 Gen 2x2 Optional Optional Optional
USB3 Gen T (variable bandwidth)[b] Optional Optional Optional
DisplayPort Yes Yes Optional
PCI Express Optional[c] Yes Optional
w/ its own PHYS
(backward compatibility) 		USB 2.0

(Low-, Full-, High-Speed)[d]

Yes Yes Optional
Alternate Modes USB-C DisplayPort [e] Yes Yes Optional
USB-C Thunderbolt Optional[c] Yes Optional
Other USB-C Alternate Modes Optional Optional Optional
  1. ^ Even for "80 Gbps" USB4 hubs, supporting asymmetric connections (in either direction) is optional, but 80 Gbit/s support is a prerequisite for any asymmetric support.
  2. ^ USB3 Gen T tunneling has defined bandwidth options. They match the total USB4 speed numbers 10,20,40,80 and even asymmetric 40/120,120/40 connections. USB4 v2 specification, p536, tab.9-19
  3. ^ a b Windows HLK requires any USB4 port support PCIe tunneling and TB3 compatibility. No minimum PCIe bandwidth requirements.[25]
  4. ^ As with USB 3.2, USB&2.0 connection runs on separate wires from main (USB 3.2/USB4) connection. Tunneling is not required as it runs in parallel on the cable.
  5. ^ The USB4 specification makes no requirements on the minimum speed or capabilities of any DP output.

Cable Compatibility

[edit]

The Type-C standard supports cable backward / downward compatibility in many situations. The compatibility typically only breaks between the different families of standards (USB&2.0, USB 3.2, USB4). The USB4 standard mandates that classic active or hybrid active cables still have vast backward compatibility support, so as to behave as if they were regular, passive cables in the eyes of the consumer.[26] But forward compatibility is limited for active cables. Only Optically Isolated Active Cables (OIAC), that should be clearly distinguishable (price, design, cable thickness, advertising) is allowed to strip most of the backwards compatibility away.

The Gen 4 transmission mode, with PAM-3 uses very different signaling to previous modes. Every active components needs to explicitly support this new signaling. But it stays within all signal quality requirements of existing, passive Gen 3 cables (USB4 and TB3).

Cable Naming and Relation to Specification Versions

[edit]

USB-IF intends only for the new, bandwidth-based logos and names to be used with consumers.[27] And for cables, the type (passive, active) and the highest supported bandwidth are usually enough to uniquely identify a cable and its supported features. Although some active types make clear distinctions where further details on the type are required. Formally, a cable type and properties are defined by a specific specification version, which was used during the development / design of said cable model, so each cable would be a valid and possibly certified cable according to a specific set of USB specification versions like "Type-C 2.3, USB 3.2, USB4 Version 2.0". But the standard is also designed to be interoperable, in that a newer specification version typically adds new modes of operation, new cable types, but does not restrict previously existing things. Because that would make existing things incompatible with new products. For this purpose even the older USB logos and labels did not include a specification version, but only stated "Certified USB SuperSpeed+ 10 Gbps". This logo identified cables that could support the 10 Gbit/s connection speeds of USB3 across both the USB 3.1 and USB 3.2 version, because the requirements for the cables have not changed. Thus the precise specification version is usually not relevant and would not make a difference.

Transmission modes such as Gen2x2 are also irrelevant to cables, as valid cables are either full-featured, having all the high speed wire-pairs for up to dual-lane connections at the stated speed or they are USB2-only or some other specific and restrictive type as listed below.

Thunderbolt compatibility

[edit]

Thunderbolt 3

[edit]

The USB4 specification states that a design goal is to "Retain compatibility with existing ecosystem of USB and Thunderbolt products." Compatibility with Thunderbolt 3 is required for USB4 hubs; it is optional for USB4 hosts and USB4 peripheral devices.[28] Compatible products need to implement 40 Gbit/s mode, at least 15 W of supplied power, and the different clock; implementers need to sign the license agreement and register a Vendor ID with Intel.[29]

Thunderbolt 4

[edit]

During CES 2020, USB-IF and Intel stated their intention to allow USB4 products that support all the optional functionality as Thunderbolt 4 products. The first products compatible with USB4 were Intel's Tiger Lake processors, with more devices appearing around the end of 2020.[30][31]

Thunderbolt 5

[edit]
Main article: Thunderbolt 5

Pinout

[edit]
Type-C receptacle pinout (end-on view)

USB4 has 24 pins in a symmetrical USB type C shell. USB4 has 12 A pins on the top and 12 B pins on the bottom.[32]

USB4 has two lanes of differential SuperSpeed pairs. Lane one uses TX1+, TX1−, RX1+, RX1− and lane two uses TX2+, TX2−, RX2+, RX2−. USB4 transfers signals at 20 Gbit/s per lane. USB4 also keeps the differential D+ and D− for USB 2.0 transfer.[33]

The CC configuration channels have the roles of creating a relationship between attached ports, detecting plug orientation due to the reversible USB type C shell, discovering the VBUS power supply pins, determining the lane ordering of the SuperSpeed lanes, and finally the USB protocol makes the CC configuration channel responsible for entering USB4 operation.[34]

Type-C receptacle A pin layout
Pin Name Description
A1 GND Ground return
A2 SSTXp1 ("TX1+") SuperSpeed differential pair #1, TX, positive
A3 SSTXn1 ("TX1-") SuperSpeed differential pair #1, TX, negative
A4 VBUS Bus power
A5 CC1 Configuration channel
A6 Dp1 USB 2.0 differential pair, position 1, positive
A7 Dn1 USB 2.0 differential pair, position 1, negative
A8 SBU1 Sideband use (SBU)
A9 VBUS Bus power
A10 SSRXn2 ("RX2-") SuperSpeed differential pair #4, RX, negative
A11 SSRXp2 ("RX2+") SuperSpeed differential pair #4, RX, positive
A12 GND Ground return
Type-C receptacle B pin layout
Pin Name Description
B12 GND Ground return
B11 SSRXp1 SuperSpeed differential pair #2, RX, positive
B10 SSRXn1 SuperSpeed differential pair #2, RX, negative
B9 VBUS Bus power
B8 SBU2 Sideband use (SBU)
B7 Dn2 USB 2.0 differential pair, position 2, negative[a]
B6 Dp2 USB 2.0 differential pair, position 2, positive[a]
B5 CC2 Configuration channel
B4 VBUS Bus power
B3 SSTXn2 SuperSpeed differential pair #3, TX, negative
B2 SSTXp2 SuperSpeed differential pair #3, TX, positive
B1 GND Ground return
  1. ^ a b There is only a single non-SuperSpeed differential pair in the cable. This pin is not connected in the plug/cable.

Software support

[edit]

USB4 is supported by:

Hardware support

[edit]

Brad Saunders, CEO of the USB Promoter Group, anticipates that most PCs with USB4 will support Thunderbolt 3, but for phones the manufacturers are less likely to implement Thunderbolt 3 support.[11]

On 3 March 2020, Cypress Semiconductor announced new Type-C power (PD) controllers supporting USB4, CCG6DF as dual port and CCG6SF as single-port.[39]

In November 2020, Apple unveiled MacBook Air (M1, 2020), MacBook Pro (13-inch, M1, 2020), and Mac mini (M1, 2020) featuring two USB4 ports.

AMD also stated that Zen 3+ (Rembrandt) processors will support USB4[40] and released products do have this feature after a chipset driver update.[41] However, AMD has only announced support for USB 3.2 Gen 2x2 in Zen 4 processors that were released in September 2022.[42][43] Intel supports Thunderbolt 3 and USB-C with the mobile 9th generation processors in 2019.

References

[edit]
  1. ^ USB4 Version 2.0 Specification 2023
  2. ^ "USB-IF Announces Publication of New USB4 Specification to Enable USB 80Gbps Performance" (PDF). 2022-10-18.
  3. ^ Type-C Cable and Connector Specification 2023
  4. ^ Type-C Cable and Connector Specification, p216f, sec. 4.6
  5. ^ USB Power Delivery Specification 2023
  6. ^ USB4 Version 2.0 Specification 2023, p15, sec. 2.1.5
  7. ^ Hill, Brandon (2019-03-04). "USB4 Leverages Thunderbolt 3 Protocol Doubling Speeds To 40Gbps". HotHardware. Archived from the original on 2021-10-23. Retrieved 2020-04-28.
  8. ^ "USB4 announced with 40Gbps bandwidth, it's based on Thunderbolt 3". GSMArena.com. Archived from the original on 2022-01-15. Retrieved 2020-04-29.
  9. ^ "With USB 4, Thunderbolt and USB will converge". 2019-03-04. Archived from the original on 2022-09-10. Retrieved 2020-05-01.
  10. ^ Hagedoorn, Hilbert. "USB 4.0 Will Arrive in Late 2020". Guru3D. Archived from the original on 2021-10-26. Retrieved 2020-04-30.
  11. ^ a b Piltch, Avram (2021-04-20). "USB 4: Everything We Know So Far". Tom's Hardware. Archived from the original on 2021-06-30. Retrieved 2020-04-30.
  12. ^ USB4 Spec. p.1
  13. ^ "USB Promoter Group Announces USB4 Version 2.0". www.businesswire.com. 2022-09-01. Archived from the original on 2022-09-02. Retrieved 2022-09-02.
  14. ^ "USB-IF Announces Publication of New USB4 Specification to Enable USB 80Gbps Performance" (PDF). USB-IF. USB Implementers Forum. 2022-10-18. Retrieved 2023-01-19.
  15. ^ Porter, Jon (2022-09-30). "USB kills off SuperSpeed branding as it tries to simplify its ubiquitous connector". The Verge. Retrieved 2024-08-05.
  16. ^ USB4 Version 2.0 Specification Inter-Domain Service 2023
  17. ^ USB4 Version 2.0 Specification 2023, p13
  18. ^ USB4 Version 2.0 Specification 2023, p487
  19. ^ USB4 Version 2.0 Specification Connection Manager Guide 2023, p59, sec. 6.1
  20. ^ USB4 Version 2.0 Specification 2023, p660, sec. 11.1.1.1.3
  21. ^ a b USB Trademark Requirements Chart from USB-IF
  22. ^ Team GraniteRiverLabs (2023-01-17). "Welcome to the 80Gpbs Ultra-High Speed Era of USB4". www.graniteriverlabs.com. GraniteRiverLabs Taiwan. Archived from the original on 2023-02-21. Retrieved 2023-02-21.
  23. ^ "How to Test and Troubleshoot USB4" (PDF). Archived (PDF) from the original on 2022-09-10. Retrieved 2022-07-25.
  24. ^ USB4 Version 2.0 Specification 2023, p17ff, sec. 2.1.1.4
  25. ^ windows-driver-content (2022-05-18). "USB4 Systems PCIe Tunneling Support". learn.microsoft.com. Retrieved 2024-08-05.
  26. ^ Type-C Cable and Connector Specification 2023, p261 para. 3
  27. ^ "USB Branding Session 2019" (PDF). usb.org. 2020-02-07. p16. Retrieved 2024-07-08.
  28. ^ USB4 Specification V1.0 August 2019 Chapter 13: "A USB4 host and USB4 peripheral device may optionally support TBT3-Compatibility. If a USB4 host or USB4 peripheral device supports TBT3-Compatibility, it shall do so as defined in this chapter".
  29. ^ "USB4 Thunderbolt3 Compatibility Requirements Specification – USB-F". Archived from the original on 2021-11-24. Retrieved 2021-11-13.
  30. ^ "USB4 devices are clear to roll out next year". Engadget. Archived from the original on 2021-11-24. Retrieved 2020-04-28.
  31. ^ Maislinger, Florian (2019-06-14). "First USB 4 devices to be launched at the end of 2020". Archived from the original on 2021-11-24. Retrieved 2020-04-28.
  32. ^ "The Relationship Between USB4 and the USB Type-C Connector". Total Phase Blog. 2020-02-18. Archived from the original on 2022-09-10. Retrieved 2022-04-05.
  33. ^ "USB4 Specification". www.usb.org. Archived from the original on 2022-04-14. Retrieved 2022-04-05.
  34. ^ Leung, Benson (2018-11-19). "USB Type-C's Configuration Channel". Medium. Archived from the original on 2022-04-05. Retrieved 2022-04-05.
  35. ^ "Linux 5.6 Kernel Released With WireGuard, USB4, New AMD + Intel Hardware Support – Phoronix". Phoronix.com. Archived from the original on 2021-11-02. Retrieved 2020-04-28.
  36. ^ "Introducing the next generation of Mac". apple.com. 2020-11-10. Archived from the original on 2021-03-01. Retrieved 2020-11-13.
  37. ^ "Introduction to the USB4 connection manager in Windows". docs.microsoft.com. Archived from the original on 2021-11-03. Retrieved 2021-11-03.
  38. ^ "February 29, 2024—KB5034848 (OS Builds 22621.3235 and 22631.3235) Preview - Microsoft Support". support.microsoft.com. Retrieved 2024-08-05.
  39. ^ Shilov, Anton. "Cypress Announces USB 3.2 & USB4-Ready Controllers: EZ-PD CCG6DF & CCG6SF". www.anandtech.com. Archived from the original on 2021-12-06. Retrieved 2020-04-28.
  40. ^ Cutress, Ian (2022-01-04). "AMD Announces Ryzen 6000 Mobile CPUs for Laptops: Zen3+ on 6nm with RDNA2 Graphics". Anandtech. Archived from the original on 2022-06-25. Retrieved 2022-07-26.
  41. ^ Klotz, Aaron (2022-06-28). "AMD Introduces USB 4 Support in Chipset Update for Ryzen 6000 Mobile (Updated)". Tom's Hardware.
  42. ^ Bonshor, Gavin (2022-05-23). "AMD Ryzen 7000 Announced: 16 Cores of Zen 4, Plus PCIe 5 and DDR5 for Socket AM5, Coming This Fall". Anandtech. Archived from the original on 2022-07-26. Retrieved 2022-07-26.
  43. ^ "AMD confirms Zen4 & Ryzen 7000 series lineup: Raphael in 2022, Dragon Range and Phoenix in 2023". VideoCardz.com. Retrieved 2022-11-29.

Specification References

[edit]


[edit]
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