IBM 4767
The IBM 4767[1] PCIe Cryptographic Coprocessor is a hardware security module (HSM)[2] that includes a secure cryptoprocessor implemented on a high-security, tamper resistant, programmable PCIe board. Specialized cryptographic electronics, microprocessor, memory, and random number generator housed within a tamper-responding environment provide a highly secure subsystem in which data processing and cryptography can be performed. Sensitive key material is never exposed outside the physical secure boundary in a clear format.
The IBM 4767[3] is validated to FIPS PUB 140-2 Level 4,[4] the highest level of certification achievable for commercial cryptographic devices. The IBM 4767 data sheet[5] describes the coprocessor in detail.
IBM supplies two cryptographic-system implementations:
- The PKCS#11[6] implementation creates a high-security solution for application programs developed for this industry-standard API.
- The IBM Common Cryptographic Architecture (CCA) implementation provides many functions of special interest in the finance industry, extensive support for distributed key management, and a base on which custom processing and cryptographic functions can be added.
Toolkits for custom application development[7] are also available.
Applications may include financial PIN transactions, bank-to-clearing-house transactions, EMV transactions for integrated circuit (chip) based credit cards, and general-purpose cryptographic applications using symmetric key algorithms, hashing algorithms, and public key algorithms.
The operational keys (symmetric or RSA private) are generated in the coprocessor and are then saved either in a keystore file or in application memory, encrypted under the master key of that coprocessor. Any coprocessor with an identical master key can use those keys. Performance benefits include the incorporation of elliptic curve cryptography (ECC) and format preserving encryption (FPE) in the hardware.
Supported systems
[edit]IBM supports the 4767 on certain IBM Z, IBM Power Systems, and x86 servers (Linux or Microsoft Windows).
- IBM Z: Crypto Express5S (CEX5S) - feature code 0890
- IBM Power Systems: feature codes EJ32 and EJ33
- x86: Machine type-model 4767-002
History
[edit]As of April 2016, the IBM 4767 superseded the IBM 4765 that was discontinued.
The IBM 4767 is supported on all platforms listed above. The successor to the 4767, the IBM 4768, was introduced on IBM Z, where it is called the Crypto Express6S (CEX6S)[8] and is available as feature code 0893.
References
[edit]- ^ "IBM HSM 4767".
- ^ (guest), Peter Smirnoff. "Understanding Hardware Security Modules (HSMs)". Retrieved 2018-04-12.
- ^ Arnold, T. W.; Check, M.; Dames, E. A.; Dayka, J.; Dragone, S.; Evans, D.; Santiago Fernandez, W.; Hocker, M. D.; Kisley, R.; Morris, T. E.; Petreshock, J.; Werner, K. (July 2015). "The next generation of highly reliable and secure encryption for the IBM z13 - IBM Journals & Magazine". IBM Journal of Research and Development. 59 (4/5): 6:1–6:13. doi:10.1147/JRD.2015.2430071. Retrieved 2018-04-10.
- ^ "Certificate Detail - Cryptographic Module Validation Program | CSRC". csrc.nist.gov. 11 October 2016. Retrieved 2018-04-10.
- ^ "IBM 4767-002 PCIe Cryptographic Coprocessor (HSM)" (PDF). IBM. 9 November 2020.
- ^ "Cryptsoft". www.cryptsoft.com. Retrieved 2018-04-10.
- ^ "IBM Systems cryptographic hardware products - United States". www.ibm.com. 2018-03-13. Retrieved 2018-04-10.
- ^ "IBM CryptoCards - PCleCC3 Overview - United States". www.ibm.com. 2018-03-20. Retrieved 2018-04-10.
External links
[edit]These links point to various relevant cryptographic standards.
- ISO 13491 - Secure Cryptographic Devices: https://www.iso.org/standard/61137.html
- ISO 9564 - PIN security: https://www.iso.org/standard/68669.html
- ANSI X9.24 Part 1: Key Management using Symmetric Techniques: https://webstore.ansi.org/RecordDetail.aspx?sku=ANSI+X9.24-1-2017
- ANSI X9.24 Part 2: Key Management using Asymmetric Techniques: https://webstore.ansi.org/RecordDetail.aspx?sku=ANSI+X9.24-2-2016
- FIPS 140-2: https://nvlpubs.nist.gov/nistpubs/FIPS/NIST.FIPS.140-2.pdf