Hitachi HD64180
 HD64180SY10 | |
| General information | |
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| Architecture and classification | |
| Instruction set | 8080, 8085, Z80, NSC 800 |
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| Transistors |
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 | This article needs additional citations for verification. (July 2009) |
The HD64180 is a Z80-based embedded microprocessor developed by Hitachi with an integrated memory management unit (MMU) and on-chip peripherals.[1] It appeared in 1985.[2] The Hitachi HD64180 "Super Z80" was later licensed to Zilog and sold by them as the Z64180 and with some enhancements as the Zilog Z180.
Overview
[edit]The HD64180 has the following features:
- Execution and bus access clock rates up to 10 MHz.[3]
- Memory Management Unit supporting 512K bytes of memory (one megabyte for the HD64180 packaged in a PLCC)
- I/O space of 64K addresses
- 12 new instructions including 8 bit by 8 bit integer multiply, non-destructive AND and illegal instruction trap vector
- Two channel Direct Memory Access Controller (DMAC)
- Programmable wait state generator
- Programmable DRAM refresh
- Two channel Asynchronous Serial Communication Interface (ASCI)
- Two channel 16-bit Programmable Reload Timer (PRT)
- 1-channel Clocked Serial I/O Port (CSI/O)
- Programmable Vectored Interrupt Controller
The HD64180 has a pipelined execution unit which processes most instructions in fewer clock cycles than the Z80. The most improved instruction group comprises the block instructions; for example those such as LDIR, CPIR, INIR and OTDR. This instruction type takes 21 transition states to execute per iteration; on the HD64180 it takes 14 t-states.
The on-chip DMAC makes block memory transfers possible at a rate faster than the LDIR/LDDR instructions.[4] The on-chip generator for wait states makes it possible to access too-slow hardware on a selective basis using a device filter, as is done for the TRS-80 Model 4's balky keyboard. The on-chip ASCI makes it possible to implement additional RS-232 serial ports.[5]
The HD64180 will not execute the "undocumented" Z80 instructions, particularly the ones that access the index registers IX and IY as 8-bit halves. The Hitachi CPU treats them as illegal instructions and accordingly executes the illegal instruction trap, redirecting the PC register to address zero.
Usage
[edit]The Micromint SB180, SemiDisk Systems DT42 CP/M computers, and Olivetti CWP 1 and ETV 210s videotypewriters (also running ROM-based CP/M 2.2) were based on the Hitachi HD64180. The XLR8er upgrade board for the TRS-80 Model 4 also used it.[6] On the Victor HC-90 and HC-95 MSX2 computer, the HD64B180 was used for its turbo mode next to the regular Z80.[7][8]
See also
[edit]References
[edit]- ^ Cohen, Charles L. (4 March 1985). "Sun Rises on New Designs". ElectronicsWeek. pp. 18–21. Retrieved 2 June 2024.
- ^ Reh, Tilmann (November 1991). "The CPU280 - When 8 Bits Aren't Enough" (PDF). The Computer Journal (53): 3-5. ISSN 0748-9331. Retrieved 1 December 2016.
- ^ "Z80 Application Note: Migrating from the Hitachi HD64180 to ZiLOG's Z80180, page 7 Summary". zilog.com/appnotes_download.php. Zilog Inc. Retrieved May 20, 2019.
- ^ Slinkman, J.F.R. "Frank". "The Misosys Quarterly Vol VI.i Autumn 1991, "The Final Solution to the XLR8er Question", page 33" (PDF). tim-mann dot org. Roy Soltoff/Misosys Inc. Retrieved May 13, 2019.
- ^ Cameron, James. "The Misosys Quarterly Vol VI.iv Summer/Fall 1992, "A New EIA-232 Driver with XLR8er", page 10" (PDF). tim-mann dot org. Roy Soltoff/Misosys Inc. Retrieved May 15, 2019.
- ^ Slinkman, J.F.R. "Frank". "The Misosys Quarterly, "How to "roll your own" on the XLR8er", page 23" (PDF). tim-mann dot org. Roy Soltoff/Misosys Inc. Retrieved May 13, 2019.
- ^ "Victor HC-95". msx dot org. Retrieved Jun 6, 2020.
- ^ "HC-95". usbsecretbase dot michikusa dot jp. Retrieved Jun 6, 2020.
Further reading
[edit]External links
[edit]- HD64180 High Integration CMOS Microcontrollers Family Datasheet
- HD64180 8-Bit High Integration CMOS Microprocessor User Manual
- HD64180 8-Bit High Integration CMOS Microprocessor Data Book
- Arthur-PC, homemade HD64180 based computer
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